Modelsim/Questa: Difference between revisions

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[[http://www.actel.com/documents/hdlcode_ug.pdf Actel HDL coding Style Guide]]
[[http://www.actel.com/documents/hdlcode_ug.pdf Actel HDL coding Style Guide]]
[[http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html VHDL primer]]


[[Category:Mikroelektronikk]]
[[Category:Mikroelektronikk]]

Revision as of 12:13, 1 February 2012

Mapping av alterabibliotek:

vmap cycloneiii /prog/altera/vhdl_libs/cycloneiii
vmap lpm /prog/altera/vhdl_libs/lpm
vmap altera /prog/altera/vhdl_libs/altera
vmap altera_mf /prog/altera/vhdl_libs/altera_mf

Simulering av VHDL

VHDL Testbenk

Synthese av VHDL

Referanselitteratur

[Wikipedia:VHDL]

[Ashenden Designs]

[VHDL Tutorial: Learn by Example]

[VHDL Quick Start (slides by Ashenden)]

[Modelsim]

[10 tips for generating reusable VHDL]

[Actel HDL coding Style Guide]

[VHDL primer]