Cadence Virtuoso overview
Laboratory exercise for building and simulating a simple CMOS inverter in Cadence Virtuoso=
To invoke Cadence Virtuoso, type the following from unix shell
ssh -X mikroserver2 source /prog/design_kits/cadence_init/cshrc.cadence.ams ams_cds -tech c35b4 -nologo -mode fb
Virtuoso Mixed Signal Design Environment should now start up:
<img src="uploads/icms_uppstart.JPG" />
In the "icms" dialog box, choose "File > New > Library".
In the "New Library" dialog box, you must give the library a name (for example TORLIB, as I did). You must also specify a technology file. Here you choose "Attach an existing techfile". Then click the OK button. When asked for technology, choose TECH_C35B4.
<img src="uploads/new_library.JPG" />
After successfully creating the new library, it is time to create your first design. In the "icms" dialog box, choose "File > New > Cellview". In the "Create New File" dialog box, you must give the design a name (for example "torcell", as I did). You must also specify which library the design belongs to, and here you specify the library that you have just created (in my case, TORLIB).
<img src="uploads/create_new_file.JPG" />
Now click OK, and the Virtuoso Schematic Editor should pop up. We will now draw a simple inverter design, as shown in the picture:
<img src="uploads/virtuoso_schematic_editor.JPG" />
Entering the design
To create the inverter design, do the following:
1. Press 'i' or click on the "Instance" icon to invoke the transistors. The "Add Instance" dialog box will now pop up. In the "Library" field, click "Browse" to open the "Library Browser". In the library browser, choose "PRIMLIB" as library, "nmos" (for n-type transistor) or "pmos" (for p-type transistor) as cell and "spectreS" as view. The cell is placed in the schematic by moving the cursor to the desired location and clicking the left mouse button.
<img src="uploads/library_browser.JPG" />
2. To insert the voltage sources, pick the "vdc" cell from the "analogLib" library.
3. To insert the ground and vdd nets, pick the "vdd" and "gnd" cells from the "analogLib" library. Here the view name should be "symbol", not "spectreS" (in fact, "symbol" is the only available option).
4. To connect the symbols, press 'w' or click the "Wire (narrow)" icon. Then use the left mouse button to click the nodes togeter, two by two.
5. To remove an instance or a wire, left click at the instance or wire that you want to remove, then press the "Delete" button on the keyboard.
6. To change the properties of the icons, press 'q' or click at the "Properties" icon. Then click at the instances or nets that you want to modify. For the vdc source connected between vdd and gnd, set the "DC voltage" property to 3.3. For the transistors, set the "Width" and "Lenght" properties to "4u" and "1u". For the pmos transistor, set the "Model name" property to "modp". For the nmos transistor, set the "Model name" property to "modn". As we will see later, the "modn" and "modp" models correspond to SPICE simulation models used by the simulator in the Analog Environment.
<img src="uploads/edit_object_properties.JPG" />
<img src="uploads/edit_object_prop_pmos.JPG" />
7. To check and save the schematic, press 'X' or click the "Check and save" icon. Make sure you get no errors or warnings. Then open "Tools > Analog Environment". The "Virtuoso Analog Environment" should now come up:
<img src="uploads/analog_env_1.JPG" />
Simulate the design
8. Choose "Setup > Simulator/Directory/Host" and set spectreS as your simulator.
9. Choose "Setup > Model Path" and add directory "/prog/hk_37/spectreS/c35/cmos53/tm" to your model path.
10. Choose "Simulation > Netlist > Create Raw".
11. Choose "Outputs > To be plotted > Select on Schematic". Click at the "vdc" node connected to the inverter input, the drain node of the nmos transistor and the net connected between the drain nodes of the nmos and pmos transistor.
12. Choose "Analyses > Choose". We will now run a dc analysis to obtain the DC transfer characteristics of the inverter. Choose "Component parameter" as your sweep variable. Then click at "Select component". In the schematic, click at the input "vdc" instance. In the "Select Component Parameter" dialog box, choose dc as your sweep parameter. The sweep range should go from 0 to 3.3.
<img src="uploads/choosing_analyses.JPG" />
<img src="uploads/select_comp_parameter.JPG" />
The analog environment should now look like this:
<img src="uploads/analog_env_2.JPG" />
13. Choose "Simulation > Run".
14. After the simulation has completed, choose "Results > Plot Outputs > DC". The outputs should look like this:
<img src="uploads/plot_output_dc.JPG" />
To save your simulation settings, choose "Session > Save state" to save your state information under whatever file namn you want. In a later session, you can reload your saved states using "Session > Load state".
Generate a Symbol
Finally, we want to generate a symbol for our inverter. This symbol is needed if we want to use our inverter design inside another design (hierarchical design methodology).
First we return to the schematic editor to add the IN and OUT pins that connect our inverter to the outside world. Click at the "Pin" symbol or press 'p' to place pins. Connect an input pin to the inverter input and an output pin to the inverter output.
<img src="uploads/add_pin.JPG" />
After checking and saving the design, choose "Design -> Create Cellview -> From Cellview".
<img src="uploads/create_cellview_from_cellview.JPG" />
Now press OK:
<img src="uploads/symbol_generation_options.JPG" />
Connect the left pin to the input pin and the right pin to the output pin. Then press OK. The symbol editor will pop up:
<img src="uploads/symbol_editor.JPG" />
Draw the symbol in whatever way you want, and then save it by clicking the "Save" symbol or pressing 'S'.