Cadence Virtuoso overview

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Revision as of 14:32, 15 September 2017 by Fli091 (talk | contribs) (Fli091 moved page Cadence Virtuoso to Cadence Virtuoso overview: Two pages named cadence on this wiki. Giving them explisit names)

Analog IC design flow using Cadence from basics (Schematic capture, Netlist extraction, Simulating using ELDO, Layout, Signoff Layout)

TSMC 130nm process

IHP 130nm process

AMS 350nm process

Simulation

Virtuoso Testbench

Layout

Layout XL and IHP SG13S

Helpful stuff

Transistor operating point printer - Script to extract transistor operating point parameters after simulation.

ADEXL-butterfly-curves - Howto make DC butterfly curves easily.